OPC Engineer

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Location All Department All Business All Clear Select how often (in days) to receive an alert: Create Alert × Select how often (in days) to receive an alert: Apply now » OPC Engineer OPC Engineer Job ID: 38935 Job ID: 38935 Date: 7 Oct 2026 Date: 7 Oct 2026 Location: Dholera, GJ, IN Location: Dholera, GJ, IN Department: Technology Development Department: Technology Development Business: Semifab Business: Semifab Job Summary: We are seeking a highly motivated OPC Engineer . The engineer will be responsible for developing, implementing, and optimizing Optical Proximity Correction (OPC) solutions to improve lithographic printability and ensure compliance with advanced process node requirements. The role involves close collaboration with Design, Process Integration, Lithography, Mask Engineering, and Foundry teams to achieve manufacturing yield and pattern fidelity goals. Key Responsibilities: Perform Model-Based OPC (MBOPC) and Rule-Based OPC (RBOPC) for advanced technology nodes.Generate and validate OPC recipes for critical semiconductor layers. Conduct lithography simulations and analyze pattern fidelity across process windows. Execute Process Window Qualification (PWQ) and hotspot analysis.Perform OPC verification and lithography checking using industry-standard EDA tools. Collaborate with Process and Foundry teams to understand lithographic challenges and develop corrective solutions. Analyze mask manufacturability issues and recommend improvements. Support RET (Resolution Enhancement Techniques) development including:Sub-Resolution Assist Features (SRAF)Source Mask Optimization (SMO)Inverse Lithography Technology (ILT)Phase Shift Mask (PSM)Drive continuous improvement of OPC methodologies and automation workflows. Debug and resolve mask-related yield and manufacturability issues. Document methodologies, best practices, and technical reports. Required Qualifications : Master's or PhD degree in: Electronics Engineering Electrical Engineering Semiconductor Technology Physics Microelectronics Related disciplines Experience: 2-10 Years (can be adjusted based on hiring level) Strong understanding of: Semiconductor manufacturing processes Optical lithography Mask synthesis and mask data preparation Process window concepts Computational lithography Required Technical Skills: Experience with OPC and RET tools from: Synopsys Proteus Siemens Calibre OPC ASML Brion solutions Equivalent computational lithography tools Knowledge of: DRC/LVS methodologies Pattern matching and hotspot detection Mask Rule Checking (MRC) Yield enhancement techniques Scripting experience in: Python Tcl Shell scripting Preferred Qualifications: Understanding of computational lithography and process modeling. Exposure to machine learning applications in OPC and hotspot detection. Familiarity with semiconductor foundry design rules and tapeout processes. Job Summary: We are seeking a highly motivated OPC Engineer . The engineer will be responsible for developing, implementing, and optimizing Optical Proximity Correction (OPC) solutions to improve lithographic printability and ensure compliance with advanced process node requirements. The role involves close collaboration with Design, Process Integration, Lithography, Mask Engineering, and Foundry teams to achieve manufacturing yield and pattern fidelity goals. Key Responsibilities: Perform Model-Based OPC (MBOPC) and Rule-Based OPC (RBOPC) for advanced technology nodes.Generate and validate OPC recipes for critical semiconductor layers. Conduct lithography simulations and analyze pattern fidelity across process windows. Execute Process Window Qualification (PWQ) and hotspot analysis.Perform OPC verification and lithography checking using industry-standard EDA tools. Collaborate with Process and Foundry teams to understand lithographic challenges and develop corrective solutions. Analyze mask manufacturability issues and recommend improvements. Support RET (Resolution Enhancement Techniques) development including:Sub-Resolution Assist Features (SRAF)Source Mask Optimization (SMO)Inverse Lithography Technology (ILT)Phase Shift Mask (PSM)Drive continuous improvement of OPC methodologies and automation workflows. Debug and resolve mask-related yield and manufacturability issues. Document methodologies, best practices, and technical reports. Required Qualifications : Master's or PhD degree in: Electronics Engineering Electrical Engineering Semiconductor Technology Physics Microelectronics Related disciplines Experience: 2-10 Years (can be adjusted based on hiring level) Strong understanding of: Semiconductor manufacturing processes Optical lithography Mask synthesis and mask data preparation Process window concepts Computational lithography Required Technical Skills: Experience with OPC and RET tools from: Synopsys Proteus Siemens Calibre OPC ASML Brion solutions Equivalent computational lithography tools Knowledge of: DRC/LVS methodologies Pattern matching and hotspot detection Mask Rule Checking (MRC) Yield enhancement techniques Scripting experience in: Python Tcl Shell scripting Preferred Qualifications: Understanding of computational lithography and process modeling. Exposure to machine learning applications in OPC and hotspot detection. Familiarity with semiconductor foundry design rules and tapeout processes. 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