Job Description
Product & Test Engineer (Probe & Final Test) - Kaynes Semicon Skip to main content Hit enter to search or ESC to close Search Close Search Menu About Why Kaynes Semicon Exists Vision Mission Leadership & Management Manufacturing & Plant Footprint Global Map Engineering Domains Research & Development Outsourced Semiconductor Assembly & Test Post-Silicon Engineering Reliability Engineering & Failure Analysis Systems Solutions Group Original Design Manufacturer Packages & Products Packaging Platforms Quad Flat No-leads (QFN) Packages Small Outline Transistor (SOT) Packages Transistor Outline (TO) Packages Semiconductor Modules Ball Grid Array (BGA) Packages Flip Chip Ball Grid Array (FCBGA) Flip Chip Chip Scale Package (FCCSP) Test & Validation Multi-Chip Module (MCM) System in Package (SiP) Co-Packaged Optics (CPO) Investors Ecosystem Building Capability Strategic & Technology Collaborations Academic Network Policy & National Alignment Knowledge Hub Blogs And Articles News Insight – Events Careers Contact Us x-twitter linkedin instagram Product & Test Engineer (Probe & Final Test) Home » Job Openings » Product & Test Engineer (Probe & Final Test) Vacancies Availability: 14 positions Company Description: Kaynes Semicon is located in GIDC, Sanand, Ahmedabad, India. Kaynes Semicon builds advanced semiconductor assembly, packaging, test, and reliability capability to enable silicon technologies to scale into industrial manufacturing. Our Vision is to be the global benchmark in semiconductor manufacturing, transforming advanced silicon into scalable, high-reliability solutions. Job Summary: We are seeking an experienced Product & Test Engineer to support end to end semiconductor product development, including silicon bring up, test program development, characterization, yield improvement and high volume manufacturing (HVM) support in OSAT (Outsourced Semiconductor Assembly and Test) environment. Responsibilities: Work with cross-functional teams on new product introduction/development through the entire NPI development cycle (Concept, definition, execution, product launch/ramp) or new product transfer from customer site for capacity expansion. Translates product specification and system requirements into test requirements and coverage methods. Support development of ATE test hardware requirements and review schematics and plots for probe card and device interface board. Drive Cost Reduction: Test Time Reduction, flow reduction and Yield Improvement. Perform yield enhancement by identifying fail modes, quantity of material affected, fallout rate, etc. Characterization (CZ) activities – Defining matrix lots, generating CZ flow, ATE CZ data collection, performing bench measurements, micro probing, thermal evaluation, data analysis, presenting and generating reports. Perform ATE data collection and failure characterization to determine the failure mechanism(s). Collaborate with Assembly, Quality & Reliability team and customer to qualify new package, BOM supplier or die revision. Assist with Customer Quality Incident investigations (ATE test, lab analysis and failure analysis support) Generate technical documentation such as statistical analysis report, evaluation summary report, lessons learned. Assist in correlating critical ATE parametric measurements correlate with lab measurements. Help drive new innovative solutions and methodologies to improve cycle time and cost. Own and manage PE deliverables working with cross functional teams. Job Qualifications: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, Computer Engineering or relevant disciplines. Proven industry experience in semiconductor ATE Product & Test Engineering for Probe and/or Final Test with min experience of 2 years. Strong programming and scripting skills, including Python, C/C++, TCL, or Perl for ATE automation and data processing. Hands-on expertise with major ATE platforms, such as: Teradyne UltraFlex, J750, Advantest V93K, National Instruments (NI), CoHu, Aemulus and AccoTest. Experience in TTR activities and PVT (Process/Voltage/Temperature) characterization on corner testing. Solid knowledge of integrated circuits in CMOS, BJT, IGBT, Power IC Devices, IPMs. Basic skills in statistics and familiarity with JMP software/Minitab software is a plus. Strong analytical capabilities in data analysis, statistical decision making and problem-solving. Strong written and verbal communication skills. Self-motivated. Able to plan, execute and deliver within given timeline. Strong team player with leadership, negotiation, and collaboration skills. Experience working with OSATs, including NPI, correlation, production qualification and Mass production is a plus. Hands-on with Handlers and Probers is a plus. Good Understanding in test hardware, including load boards, probe cards, and socket. Job Category: Post-Silicon Engineering Job Type: Full Time Job Location: Sanand - Gujarat Apply for this position Full Name * Email * Phone * Bio * Upload CV/Resume * Allowed Type(s): .pdf, .doc, .docx By using this form you agree with the storage and handling of your data by this website. * Previous Post Failure Analysis Engineer Next Post Product Engineering Technician – Probe & Final Test Share Share Share Share Pin Quick Links About Us Engineering Domains Packages & Products Careers Contact us Corporate Office Kaynes Semicon Private Limited, Industrial Area II, Sanand, Gujarat PIN : 382170 Contact Us Email: in ** @ *********** on.com Terms of Use | Privacy Policy | Cookie Policy | Legal Disclaimer | Compliance Copyright © 2026 Kaynes Semicon. All Rights Reserved. Subsidiary of Kaynes Technology India Ltd Close Menu About Why Kaynes Semicon Exists Vision Mission Leadership & Management Manufacturing & Plant Footprint Global Map Engineering Domains Research & Development Outsourced Semiconductor Assembly & Test Post-Silicon Engineering Reliability Engineering & Failure Analysis Systems Solutions Group Original Design Manufacturer Packages & Products Packaging Platforms Quad Flat No-leads (QFN) Packages Small Outline Transistor (SOT) Packages Transistor Outline (TO) Packages Semiconductor Modules Ball Grid Array (BGA) Packages Flip Chip Ball Grid Array (FCBGA) Flip Chip Chip Scale Package (FCCSP) Test & Validation Multi-Chip Module (MCM) System in Package (SiP) Co-Packaged Optics (CPO) Investors Ecosystem Building Capability Strategic & Technology Collaborations Academic Network Policy & National Alignment Knowledge Hub Blogs And Articles News Insight – Events Careers Contact Us x-twitter linkedin instagram
